package com.unione.heathrobot.constant

import java.util.TreeMap

/**
 *  功放参数
 */
object AmpParams {

    const val PA_Addr = 0x30
    const val i2c_bus_num = "/dev/i2c-4"

    val Reg: TreeMap<Int, Int> = TreeMap()


     init {
        Reg[0x00] = 0x00 ////##State_Control_1
        Reg[0x01] = 0x81 ////##State_Control_2
        Reg[0x02] = 0x00 ////##State_Control_3
        // Reg[0x03] = 0x0e //#Master_volume_control
        //Reg[0x03] = 0x28
           //Reg[0x03] = 0x12
        Reg[0x03] = 0x07
        Reg[0x04] = 0x18 //##Channel_1_volume_control
        Reg[0x05] = 0x18 //##Channel_2_volume_control
        Reg[0x06] = 0x18 //##Channel_3_volume_control
        Reg[0x07] = 0x18 //##Channel_4_volume_control
        Reg[0x08] = 0x18 //##Channel_5_volume_control
        Reg[0x09] = 0x18 //##Channel_6_volume_control
        Reg[0x0a] = 0x00 //##Reserve
        Reg[0x0b] = 0x00 //##Reserve
        Reg[0x0c] = 0x90 //##State_Control_4
        Reg[0x0d] = 0x80 //##Channel_1_configuration_registers
        Reg[0x0e] = 0x80 //##Channel_2_configuration_registers
        Reg[0x0f] = 0x80 //##Channel_3_configuration_registers
        Reg[0x10] = 0x80 //##Channel_4_configuration_registers
        Reg[0x11] = 0x80 //##Channel_5_configuration_registers
        Reg[0x12] = 0x80 //##Channel_6_configuration_registers
        Reg[0x13] = 0x80 //##Channel_7_configuration_registers
        Reg[0x14] = 0x80 //##Channel_8_configuration_registers
        Reg[0x15] = 0x6a //##Reserve
        Reg[0x16] = 0x6a //##Reserve
        Reg[0x17] = 0x6a //##Reserve
        Reg[0x18] = 0x6a //##Reserve
        Reg[0x19] = 0x00 //##Reserve
        Reg[0x1a] = 0x28 //##State_Control_5
        Reg[0x1b] = 0x80 //##State_Control_6
        Reg[0x1c] = 0x20 //##State_Control_7
        Reg[0x1d] = 0x7f //##Coefficient_RAM_Base_Address
        Reg[0x1e] = 0x00 //##First_4-bits_of_coefficients_A1
        Reg[0x1f] = 0x00 //##Second_8-bits_of_coefficients_A1
        Reg[0x20] = 0x00 //##Third_8-bits_of_coefficients_A1
        Reg[0x21] = 0x00 //##Fourth-bits_of_coefficients_A1
        Reg[0x22] = 0x00 //##First_4-bits_of_coefficients_A2
        Reg[0x23] = 0x00 //##Second_8-bits_of_coefficients_A2
        Reg[0x24] = 0x00 //##Third_8-bits_of_coefficients_A2
        Reg[0x25] = 0x00 //##Fourth_8-bits_of_coefficients_A2
        Reg[0x26] = 0x00 //##First_4-bits_of_coefficients_B1
        Reg[0x27] = 0x00 //##Second_8-bits_of_coefficients_B1
        Reg[0x28] = 0x00 //##Third_8-bits_of_coefficients_B1
        Reg[0x29] = 0x00 //##Fourth_8-bits_of_coefficients_B1
        Reg[0x2a] = 0x00 //##First_4-bits_of_coefficients_B2
        Reg[0x2b] = 0x00 //##Second_8-bits_of_coefficients_B2
        Reg[0x2c] = 0x00 //##Third_8-bits_of_coefficients_B2
        Reg[0x2d] = 0x00 //##Fourth-bits_of_coefficients_B2
        Reg[0x2e] = 0x00 //##First_4-bits_of_coefficients_A0
        Reg[0x2f] = 0x80 //##Second_8-bits_of_coefficients_A0
        Reg[0x30] = 0x00 //##Third_8-bits_of_coefficients_A0
        Reg[0x31] = 0x00 //##Fourth_8-bits_of_coefficients_A0
        Reg[0x32] = 0x00 //##Coefficient_RAM_R/W_control
        Reg[0x33] = 0x06 //##State_Control_8
        Reg[0x34] = 0xf0 //##State_Control_9
        Reg[0x35] = 0x00 //##Volume_Fine_tune
        Reg[0x36] = 0x00 //##Volume_Fine_tune
        Reg[0x37] = 0x00 //##Device_ID_register
        Reg[0x38] = 0x00 //##Level_Meter_Clear
        Reg[0x39] = 0x00 //##Power_Meter_Clear
        Reg[0x3a] = 0x00 //##First_8bits_of_C1_Level_Meter
        Reg[0x3b] = 0x4d //##Second_8bits_of_C1_Level_Meter
        Reg[0x3c] = 0x99 //##Third_8bits_of_C1_Level_Meter
        Reg[0x3d] = 0x55 //##Fourth_8bits_of_C1_Level_Meter
        Reg[0x3e] = 0x00 //##First_8bits_of_C2_Level_Meter
        Reg[0x3f] = 0x4d //##Second_8bits_of_C2_Level_Meter
        Reg[0x40] = 0x02 //##Third_8bits_of_C2_Level_Meter
        Reg[0x41] = 0x02 //##Fourth_8bits_of_C2_Level_Meter
        Reg[0x42] = 0x00 //##First_8bits_of_C3_Level_Meter
        Reg[0x43] = 0x00 //##Second_8bits_of_C3_Level_Meter
        Reg[0x44] = 0x00 //##Third_8bits_of_C3_Level_Meter
        Reg[0x45] = 0x00 //##Fourth_8bits_of_C3_Level_Meter
        Reg[0x46] = 0x00 //##First_8bits_of_C4_Level_Meter
        Reg[0x47] = 0x00 //##Second_8bits_of_C4_Level_Meter
        Reg[0x48] = 0x00 //##Third_8bits_of_C4_Level_Meter
        Reg[0x49] = 0x00 //##Fourth_8bits_of_C4_Level_Meter
        Reg[0x4a] = 0x00 //##First_8bits_of_C5_Level_Meter
        Reg[0x4b] = 0x00 //##Second_8bits_of_C5_Level_Meter
        Reg[0x4c] = 0x00 //##Third_8bits_of_C5_Level_Meter
        Reg[0x4d] = 0x00 //##Fourth_8bits_of_C5_Level_Meter
        Reg[0x4e] = 0x00 //##First_8bits_of_C6_Level_Meter
        Reg[0x4f] = 0x00 //##Second_8bits_of_C6_Level_Meter
        Reg[0x50] = 0x00 //##Third_8bits_of_C6_Level_Meter
        Reg[0x51] = 0x00 //##Fourth_8bits_of_C6_Level_Meter
        Reg[0x52] = 0x00 //##First_8bits_of_C7_Level_Meter
        Reg[0x53] = 0x00 //##Second_8bits_of_C7_Level_Meter
        Reg[0x54] = 0x00 //##Third_8bits_of_C7_Level_Meter
        Reg[0x55] = 0x00 //##Fourth_8bits_of_C7_Level_Meter
        Reg[0x56] = 0x00 //##First_8bits_of_C8_Level_Meter
        Reg[0x57] = 0x00 //##Second_8bits_of_C8_Level_Meter
        Reg[0x58] = 0x00 //##Third_8bits_of_C8_Level_Meter
        Reg[0x59] = 0x00 //##Fourth_8bits_of_C8_Level_Meter
        Reg[0x5a] = 0x05 //##I2S_data_output_selection_register
        Reg[0x5b] = 0x00 //##Mono_Key_High_Byte
        Reg[0x5c] = 0x00 //##Mono_Key_Low_Byte
        Reg[0x5d] = 0x07 //##Hi-res_Item
        Reg[0x5e] = 0x00 //##Analog_gain
        Reg[0x5f] = 0x00 //##Reserve
        Reg[0x60] = 0x00 //##Reserve
        Reg[0x61] = 0x00 //##Reserve
        Reg[0x62] = 0x00 //##Reserve
        Reg[0x63] = 0x00 //##Reserve
        Reg[0x64] = 0x00 //##Reserve
        Reg[0x65] = 0x00 //##Reserve
        Reg[0x66] = 0x00 //##Reserve
        Reg[0x67] = 0x00 //##Reserve
        Reg[0x68] = 0x00 //##Reserve
        Reg[0x69] = 0x00 //##Reserve
        Reg[0x6a] = 0x00 //##Reserve
        Reg[0x6b] = 0x00 //##Reserve
        Reg[0x6c] = 0x01 //##FS_and_PMF_read_out
        Reg[0x6d] = 0x00 //##OC_level_setting
        Reg[0x6e] = 0x40 //##DTC_setting
        Reg[0x6f] = 0x74 //##Testmode_register0
        Reg[0x70] = 0x07 //##Reserve
        Reg[0x71] = 0x40 //##Testmode_register1
        Reg[0x72] = 0x38 //##Testmode_register2
        Reg[0x73] = 0x18 //##Dither_signal_setting
        Reg[0x74] = 0x06 //##Error_delay
        Reg[0x75] = 0x55 //##First_8bits_of_MBIST_User_Program_Even
        Reg[0x76] = 0x55 //##Second_8bits_of_MBIST_User_Program_Even
        Reg[0x77] = 0x55 //##Third_8bits_of_MBIST_User_Program_Even
        Reg[0x78] = 0x55 //##Fourth_8bits_of_MBIST_User_Program_Even
        Reg[0x79] = 0x55 //##First_8bits_of_MBIST_User_Program_Odd
        Reg[0x7a] = 0x55 //##Second_8bits_of_MBIST_User_Program_Odd
        Reg[0x7b] = 0x55 //##Third_8bits_of_MBIST_User_Program_Odd
        Reg[0x7c] = 0x55 //##Fourth_8bits_of_MBIST_User_Program_Odd
        Reg[0x7d] = 0xfe //##Error_register
        Reg[0x7e] = 0xfe //##Error_latch_register
        Reg[0x7f] = 0x00 //##Error_clear_register
        Reg[0x80] = 0x00 //##Protection_register_set
        Reg[0x81] = 0x00 //##Memory_MBIST_status
        Reg[0x82] = 0x00 //##PWM_output_control
        Reg[0x83] = 0x00 //##Testmode_control_register
        Reg[0x84] = 0x00 //##RAM1_test_register_address
        Reg[0x85] = 0x00 //##First_8bits_of_RAM1_data
        Reg[0x86] = 0x00 //##Second_8bits_of_RAM1_Data
        Reg[0x87] = 0x00 //##Third_8bits_of_RAM1_data
        Reg[0x88] = 0x00 //##Fourth_8bits_of_RAM1_Data
        Reg[0x89] = 0x00 //##RAM1_test_r/w_control
        Reg[0x8a] = 0x00 //##RAM2_test_register_address
        Reg[0x8b] = 0x00 //##First_8bits_of_RAM2_data
        Reg[0x8c] = 0x00 //##Second_8bits_of_RAM2_Data
        Reg[0x8d] = 0x00 //##Third_8bits_of_RAM2_data
        Reg[0x8e] = 0x00 //##Fourth_8bits_of_RAM2_Data
        Reg[0x8f] = 0x00 //##RAM2_test_r/w_control
        Reg[0x90] = 0x00 //##Reserve
        Reg[0x91] = 0x00 //##Reserve
        Reg[0x92] = 0x00 //##Reserve
        Reg[0x93] = 0x00 //##Reserve
        Reg[0x94] = 0x00 //##Reserve
        Reg[0x95] = 0x00 ////##Reserve
        Reg[0x96] = 0x00 ////##Reserve
        Reg[0x97] = 0x00 ////##Reserve
        Reg[0x98] = 0x00 ////##Reserve
        Reg[0x99] = 0x00  ////##Reserve
        Reg[0x9a] = 0x00 ////##Reserve
        Reg[0x9b] = 0x00 ////##Reserve
    }

}